1. Field of the Invention
This invention relates to an electrodeposited copper foil for use in the manufacture of printed wiring boards and a method for manufacturing the electrodeposited copper foil. In particular, this invention relates to an electrodeposited copper foil having a fine nodular electrodeposit which is uniformly and densely formed on the matte or rough surface side of the electrodeposited copper foil, the matte surface side of the electrodeposited copper foil being removed by buffing before the fine nodules are deposited. The electrodeposited copper foil formed in this manner has excellent etching properties and hence is suited for forming ultra-fine circuit patterns which have excellent high-frequency characteristics and which provide good insulation reliability.
2. Description of Related Art
The electrodeposited copper foil employed in the manufacture of a printed wiring board is generally obtained by electrodepositing copper on the surface of a cathode drum, and then separating the resulting electrodeposited copper layer from the cathode drum. One side of this electrodeposited copper foil is formed next to the drum and is relatively smooth (i.e. shiny or glossy), but the outer surface on which copper deposits are grown has a matte appearance (i.e. a rough profile). The copper-clad laminated board employed in the manufacture of printed wiring boards is manufactured by forming a nodular or granular copper electrodeposit on the matte surface of electrodeposited copper foil (a nodular forming treatment), and then laminating this treated surface of the foil to a resin substrate, typically a glass fiber-epoxy composite or polyimide film. The wiring pattern of the printed wiring board is made by etching this copper-clad laminated board.
However, in view of the recent trend toward making ultra-fine patterns on printed wiring boards, the irregularity of the matte surface side of the copper foil has caused a problem. The irregularity of the matte surface side of the copper foil is relatively large as compared with the fineness of a wiring pattern which is to be formed on the printed wiring board, thereby causing a deterioration in the reliability of the insulation between circuit lines or between opposing circuit layers.
In order to overcome this problem, there has been recently employed a very low profile foil (VLP foil), i.e. an electrodeposited copper foil whose matte surface is controlled to have a low roughness. According to JIS B 0601, an ordinary electrodeposited copper foil having a thickness of 18 .mu.m has a surface roughness of 5 to 8 .mu.m on its matte side. Whereas, in the case of the VLP foil, the surface roughness matte side is about 3 to 5 .mu.m. On the other hand, the surface roughness of the shiny surface (the smooth surface side) of this electrodeposited copper foil, which is opposite to the matte surface side, is about 1.5 to 2.0 .mu.m irrespective of the thickness and type of the electrodeposited copper foil since this smooth surface is transferred from the surface of the drum.
Even if the surface roughness of the VLP foil is relatively low, some degree of roughness still remains on the surface of the VLP foil and the nodules formed in the nodular treatment are concentrated at the tops of convex portions or peaks which constitute the surface roughness. If the nodules are concentrated in this manner, they may become copper remnants embedded in the substrate after the formation of a fine circuit pattern so that extra-etching for removing these copper remnants may be required. If this extra-etching is performed, the fine pattern is over-etched, thus causing the line width of the pattern to become narrower than desired.
A method for forming a fine pattern has been proposed (Japanese Patent Application Kokai No. Hei 6-270,331) wherein the aforementioned nodular forming treatment is carried out on the smooth surface (shiny) side of an electrodeposited copper foil, and then a substrate is laminated on to the smooth surface side, thereby manufacturing a copper-clad laminated board which can be used for forming a fine circuit pattern. However, according to this Japanese Patent Application (Kokai No. Hei 6-270,331), it is difficult to uniformly electrodeposit copper granules on the smooth surface of an electrodeposited copper foil. Although the surface roughness Rz after the nodular forming treatment is as low as 2.0 to 2.2, nodules of relatively large size are locally formed, thereby making it difficult to employ such foils in making an ultra-fine circuit pattern.
It has also been proposed that the aforementioned nodular forming treatment should be carried out after an electrodeposited copper foil is worked by rolling so that the shape of the matte surface is not completely eliminated (Japanese Patent Application Kokoku No. Sho 62-42,022).
Furthermore, it has been proposed that the aforementioned nodular forming treatment should be carried out after the electrodeposited copper foil has been subjected to grinding, planing, plasma discharge or electrolytic polishing so that the original irregular surface on the matte side of the foil is not completely eliminated (Japanese Patent Application Kokai No. Sho 59-145,800).
However, in any of these methods of forming nodules part of the original rugged surface of the copper foil still remains, so that it is difficult to carry out a uniform formation of minute nodules, i.e. it is impossible to avoid local electrodeposition of nodules, thus failing to reduce the roughness of the original matte surface of the foil to any substantial degree. In other words, it has been impossible according to the prior art to obtain an electrodeposited copper foil which has excellent etching properties and thus is suited for use in forming ultra-fine circuit patterns which have excellent high-frequency characteristics and which provide good insulation reliability.